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Structural engineer temporary jobs in Azusa (2 jobs)

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Digital Engineer (Verilog, UVM)

  • ComTec Information Systems
  • Azusa
Description: Required: Bachelor's degree requiredMinimum of 5yrs writing SystemVerilog and UVM as a primary job function Experience with verification of designs written in VHDL Experience with Linux command line workflows Experience writing TCL to control ...
10 days ago

Design Verification Engineer - System Verilog and UVM

  • ASD, Inc.
  • Azusa
Description: Required: Bachelor's degree requiredMinimum of 5yrs writing SystemVerilog and UVM as a primary job functionExperience with verification of designs written in VHDLExperience with Linux command line workflowsExperience writing TCL to control ...
10 days ago

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