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Phy design verification engineer jobs in California (582 jobs)

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  • Apple, Inc.
  • San Diego
... emphasis on highly energy efficient design and new technologies that transform ... /Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and i
23 days ago
  • Apple, Inc.
  • Sunnyvale
... emphasis on highly energy efficient design and new technologies that transform ... /Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and i
23 days ago
  • Apple, Inc.
  • Sunnyvale
... emphasis on highly energy efficient design and new technologies that transform ... /Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and i
23 days ago
  • Apple, Inc.
  • San Diego
... emphasis on highly energy efficient design and new technologies that transform ... /Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and i
23 days ago
  • Apple, Inc.
  • San Diego
... emphasis on highly energy efficient design and new technologies that transform ... /Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and i
23 days ago
  • Cynet Systems
  • Sunnyvale
... for Design Verification Engineer for our client in Sunnyvale, CA Job Title: Design Verification Engineer Job ... from test planning to closing verification using coverage metrics.Involves test ... features.Work closely with the design team to review s
29 days ago
  • Innova Solutions, Inc
  • San Francisco
... is immediately hiring a Design Verification Engineer Position type: Full Time. ... Francisco, CA (Onsite) As a Design Verification Engineer, you will: Minimum Qualifications: ... 7+ years of ASIC verification experience with UVM (or ...
26 days ago
  • National Computer Systems
  • Campbell
Description: Role: Design Verification Engineer Work Location: Santa Clara, CA ... of experience in pre-silicon design verification Proficiency in C-shell scripting, ... and functional code coverage. SOC Verification experience using ARM Cortex Microcontroller ...
29 days ago
Description: Job Title: Design Verification Engineer Locations: San Jose, CA Type ... EE/CE, plus 7+ years of Design Verification experience Familiarity with ASIC, Computer ...
23 days ago
  • Broadcom Corporation
  • San Jose
... looking for a senior level Digital Design Verification engineer. In this highly visible role ...
9 days ago
  • Codeforce 360
  • Santa Clara
Description: Career Opportunity: Job Title: Design Verification Engineer About CodeForce 360 Making a career ...
9 days ago
  • U.S. Tech Solutions Inc.
  • Goleta
Description: Job Description: As a Verification Engineer, you will own functional verification for a custom controller ... develop functional verification infrastructure to ensure functional correctness of a design as well ...
29 days ago
... emphasis on highly energy efficient design and new technologies that transform ... /Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and i
23 days ago
... emphasis on highly energy efficient design and new technologies that transform ... /Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and i
23 days ago
... primary job functionExperience with verification of designs written in VHDLExperience with Linux ... writing TCL to control verification toolsDemonstrated ability in root- ... designers to collaboratively resolve verification test failuresExperience with Git ...
10 days ago
  • Meta Platforms, Inc. (f/k/a Facebook, Inc.)
  • Sunnyvale
... position in Sunnyvale, CA: ASIC Engineer, Design Verification: Define and implement IP/SoC ... verification plans, build verification test benches to enable ... IP/sub-system/SoC level verification. (ref. code REQ-2405-137726 ...
a month ago
  • Broadcom Corporation
  • San Jose
... before you apply. Job Description: Verification Engineer Job duties and requirements include ... industry experience. Experience in verifying designs at system level and
9 days ago
  • Judge Group, Inc.
  • Goleta
... Hourly Description: Title: FPGA/ASIC Verification Engineer Location: Goleta, CA Duration: 06 ... experience.8 years of experience with verification methodologies and languages such as ... .Experience developing and maintaining verification test benches, test ca
29 days ago
  • Sierra Business Solution LLC
  • Palo Alto
Description: Title : Software Verification Engineer (Non -Clinical) - Candidates must have ... detail-oriented Medical Device Software Verification Tester to join our team ...
22 days ago
  • VDart, Inc.
  • Palo Alto
Description: Title: Software Verification Engineer (Clinical) - Must to have : Python, ... detail-oriented Medical Device Software Verification Tester to join our team ...
29 days ago