Description: FPGA Design Verification Engineer (OVM - UVM design verification, FPGA - ASIC design, bash, csh, Perl ... POSITION: FPGA Design Verification Engineer (OVM - UVM design verification, FPGA - ASIC design, bash, csh ...
a day ago
... technology solutions company * Senior FPGA Design Verification Engineer - Secret Clearance * Please apply ...
6 days ago
Description: Basic QualificationsBachelor s degree in Electrical or Computer Engineering, or a related Science, Engineering or Mathematics field, plus a minimum of 8 years of relevant experience; or Master's degree plus a minimum of 6 years of relevant ...
5 hours ago