... Design Verification Engineer Location: Mountain View, CA (Hybrid) Hire Type: Contract Job Description Design Verification Engineer ... of AMBA protocols. Understand design specs and develop test ... UVM/System Verilog-based verification environments for IP/subsystem ...
5 days ago
... Design Verification Engineer Location: Mountain View, CA (Hybrid) Hire Type: Contract Job Description Design Verification Engineer ... of AMBA protocols. Understand design specs and develop test ... UVM/System Verilog-based verification environments for IP/subsystem ...
18 days ago
Description: Role: RTL Integration Engineer Location: Sunnyvale CA (On-Site) ... Experience: Proven experience in RTL design and integration (using Verilog, VHDL ... ). Hands-on experience with digital design verification and subsystem integration. Experience with ...
4 days ago
... looking for a highly skilled Physical Design Engineer to work at block level ... aspects of the backend VLSI design flow, including floorplanning, placement, clock ... , timing closure, and sign-off verification. The role requires expertise in ...
6 days ago
Description: Only Fulltime! System engineer Location: Mountain View, CA Responsibilities: - ... proper synthesis. Collaborated with multiple design teams to assist in regression ...
11 days ago