Description: Role: Design Verification Engineer Location: Mountain View, CA (Hybrid) ... Type: Contract Job Description Design Verification Engineer Key Responsibilities: 08-14 Years ... Build UVM/System Verilog-based verification environments for IP/subsystem/SoC ...

3 days ago

Senior Design Verification Engineer

AIT Global, Inc.
Mountain View

Description: Job Title: Senior Design Verification Engineer Location: Mountainview, CA What candidate ... based C and SV/UVM mix Verification. What we are looking for ...

5 days ago

Physical Design Engineer

Avtech Solutions
Mountain View

... for a highly skilled Physical Design Engineer to work at block level ... -performance ASICs, SoCs, and custom silicon chips with strong scripting skills ... , timing closure, and sign-off verification. The role requires expertise in ...

4 days ago

RTL Integration Engineer

Avtech Solutions
Mountain View

Description: Role: RTL Integration Engineer Location: Sunnyvale CA (On-Site) ... -on experience with digital design verification and subsystem integration. Experience with ...

2 days ago

Physical Design Engineer RTL Integration Engineer

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