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Design verification pcie jobs in San Francisco (1 jobs)

Static timing analysis (sta) engineer
dice.com
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Static Timing Analysis (STA) Engineer

  • IT Trailblazers, LLC
  • San Francisco
... verification and closure of high-performance ASICs, SoCs, and custom semiconductor designs ... timing analysis, debugging violations, optimizing designs for performance, and working closely ... with physical design and RTL teams to achieve ...
15 days ago

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