Description: Role: FPGA Validation Engineer Location: Santa Clara, CA (Onsite) 5 ... speed communication protocols validation (e.g., DDR, HDMI, PCIe, Ethernet). FPGA verification methodologies Test ...
20 days ago
... a highly skilled Senior Validation Engineer to lead the testing ... and validation of semiconductor components, ... experience in System Level Validation, which includes rack level ... designing, executing, and analyzing validation tests, as well as ...
8 days ago
... a highly skilled Senior Validation Engineer to lead the testing ... and validation of semiconductor components, ... experience in System Level Validation, which includes rack level ... designing, executing, and analyzing validation tests, as well as ...
13 days ago
Description: Job Title:- Senior Validation Engineer Hardware & Software Location:- Santa Clara ... looking for a Senior Validation Engineer to lead critical validation and testing efforts ... Responsibilities: Develop and execute validation test plans for advance
2 days ago
... Rack Team Lead / Senior Validation Engineer Location: Santa Clara, CA ... a highly skilled Senior Validation Engineer to lead the testing ... and validation of semiconductor components, ... experience in System Level Validation, which includes rack ...
8 days ago
Description: Role Title: Validation Engineer Location: Santa Clara, CA Duration ... plans, completes functional & electrical validation, & debugs issues for memory ... client processors using hardware & software validation tools, oscilloscopes, & logic analyzers. ...
7 days ago
Description: Position: Firmware Validation Engineer Location: USA Exp: 8+ Key Skills: C, C++ ... hardware. Testing, debugging, verification, and validation of functional modu
22 days ago
Description: NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep ...
20 days ago
Description: Work Schedule Standard (Mon-Fri) Environmental Conditions Able to lift 40 lbs. without assistance, Adherence to all Good Manufacturing Practices (GMP) Safety Standards, Office, Some degree of PPE (Personal Protective Equipment) required ( ...
25 days ago
Description: Job Title: Lead Engineer - AI and FPGA Integration Expert Experience : 10-15 ... latest DS1 architecture 2. Experience in FPGA Vivado tool flow and problem ... agile project methodology Technical Skills FPGA & AI Model Integration: Experience with ...
21 hours ago
... Vehicle bring up, Verification and Validation test at large scale. Experience ... Driving. Testing, quality assessment, and validation of AV and ADAS features ...
10 days ago
Description: Title: RTL Engineer Location: Santa Clara, CA (Day-1 ... , architecture, verification, and post-silicon validation) to ensure seamless delivery. Develop ...
9 days ago
... : Position Title: Sr. AI/ ML Engineer Location: Santa Clara, CA - Hybrid ... : Coordinate with teams on the validation and enhancement of Generative AI ...
15 days ago