... looking for Senior RTL Design Engineer for our client in ... Job Title: Senior RTL Design Engineer Job Location: Santa Clara, ... .86hr Responsibilities:Perform RTL design of digital components in ... improve/automate the design process.SOC Design integration tasks ...
4 days ago
... looking for Senior ASIC/RTL Design Engineer for our client in San ... Job Title: Senior ASIC/RTL Design Engineer Job Location: San Jose, CA ... leading, and participating in, the design of leading edge SoCs in ...
10 days ago
... : AI HW Design Verification Engineer Looking for a Senior Design Verification Engineer. This person ... and reliability of digital designs through comprehensive verification methodologies. ... skilled at delivering high quality designs. Scope: Develop & execute ...
17 days ago
Description: Design Verification Engineer Scope: Design and development of the IO ... teams. Develop detailed block-level design specifications and plans for a high ... and optimize the IO subsystem design to ensure functionality and performance ...
24 days ago
Description: Job Title: Network Engineer Number of Roles Open: 2 Location: ... to extend Key Responsibilities: Network Design & Management: Design, imple
29 days ago
... actual, potential, and internal clients. Design, develop, and implement highly scalable ... . Recommend alternate approaches, analyze product design impact, and provide sizing estimates ...
4 days ago
... opportunity for Electrical and Electronics Engineer. This is a Full Time/ ... this. Title: Electrical and Electronics Engineer Location: Santa Clara, CA ( ... packaging exp with Semi expASIC Design Good understandingAdvanced Packaging TechnologiesSystem Integration ...
5 days ago
Description: Role: Electrical and Electronics Engineer Location: Santa Clara, CA ( Day 1 ... , packaging exp with Semi expASIC Design Good understandingAdvanced Packaging TechnologiesSystem Integration ...
17 days ago
Description: FW Verification Engineer The RISC-V CPU team owns ... : Define FW verification strategy, considering design maturity, cost-benefit analysis of ...
22 days ago
Description: Sr Verification Engineer VCS Distributed Simulation & Multi-Chip ... Verification Looking for a Senior Verification Engineer with expertise in VCS distributed ... for complex, multi-die SoC designs, optimizing performance and ensuring high ...
16 days ago
... / Consultant / Engineer role where she/he has led the design/implementation of ...
4 days ago
... /Consultant / Engineer role where she/he has led the design/implementation of ...
4 days ago
... highly motivated System Administrator/DevOps Engineers to design, develop and implement a global ...
16 days ago