Description:
Physical Design Engineer Requirements: 2-3+ years of experience with PD. Tools, flow, & design methodology from RTL synthesis to GDSII sign-off. Experience with back-end design & timing closure on 3nm-7nm. Experience with UPF-based low power design methodologies, power verification, synthesis, scan insertion/ATPG, formal verification, floor planning, placement, CTS, routing, IR drop, and EM/antenna analysis. Creative & able to think from 1st principles. Pluses: Familiar with transformer models &
Feb 26, 2025;
from:
dice.com