Description:
Job Description: Assist in developing and implementing UVM-based verification plans for FPGA designs.Perform functional and regression testing for digital hardware components.Develop and maintain test benches, test cases, and automation scripts in System Verilog.Analyze test results, debug issues, and collaborate with senior engineers to resolve defects.Ensure compliance with industry standards and customer requirements.Document test procedures, results, and defect tracking.Continuously learn an
Mar 7, 2025;
from:
dice.com