Description:
Job Title: SoC Design Verification Engineer Location: Redmond, WA (Onsite) Duration: 10+ Months We are looking for an experienced SoC Design Verification Engineer to join our team in Redmond, WA for a 10+ month onsite role. The ideal candidate will have a strong background in ASIC verification, a proven track record of first-pass success in ASIC development cycles, and hands-on expertise in SystemVerilog/UVM methodology. Key Responsibilities: Define and implement SoC verification plans and devel
Apr 1, 2025;
from:
dice.com