Description:
Job Title: Junior Verification Engineer Location: New Jersey Job Type: Contractor About AirSpanAirSpan is seeking a motivated Junior Verification Engineer to contribute to the validation and testing of FPGA designs. This role offers an opportunity to develop expertise in Universal Verification Methodology (UVM) and SystemVerilog while working alongside experienced engineers in a collaborative environment. Job DescriptionAs a Junior UVM SystemVerilog Verification Engineer, you will support the de
Apr 4, 2025;
from:
dice.com