Description: Sr Verification Engineer VCS Distributed Simulation & Multi-Chip Verification Looking for a Senior Verification Engineer with ... expertise in VCS distributed simulation and multi-chip verification. You ...
16 days ago
Description: Design Verification Engineer - CPU Subsystem Looking for a Design Verification Engineer to play a ... in System Verilog (SV) & UVM, with a focus on developing verification ... analysis, UVC development, & verification of complex protocols like AXI ...
20 days ago
Description: Design Verification CPU Core & Block Looking for a ... feature/test plan verification engineer responsible for ISA & microarchitectural verification. This will be ... Santa Clara, CA. Scope: Functional verification with emphasis on core level ...
20 days ago
Description: RTL Design Engineer Looking for a solid RTL Design Engineer who has a strong ... understanding of verification flows. This person should be a strong engineer and be ...
4 days ago
... a skilled AI Scale-Out Software Engineer to build and optimize our ... expertise in deep learning, distributed systems, and low-level networking. Responsibilities ... and implement efficient distributed training systems for large-scale deep le
10 days ago