Description: Sr Verification Engineer VCS Distributed Simulation & Multi-Chip Verification Looking for a Senior Verification Engineer with ... expertise in VCS distributed simulation and multi-chip verification. You ...
10 days ago
... Description: Design Verification Engineer - CPU Subsystem Looking for a Design Verification Engineer to play ... UVM, with a focus on developing verification environments, executing test plans, & ... , UVC development, & verification of complex protocols like ...
14 days ago
Description: Design Verification CPU Core & Block Looking for a ... feature/test plan verification engineer responsible for ISA & microarchitectural verification. This will be ... Santa Clara, CA. Scope: Functional verification with emphasis on core level ...
14 days ago
Description: Physical Design Engineer Requirements: 2-3+ years of experience with ... low power design methodologies, power verification, synthesis, scan insertion/ATPG, ... formal verification, floor planning, placement, CTS, routing, ...
5 days ago
Description: Physical Design Engineer Requirements: 2-3+ years of experience with ... low power design methodologies, power verification, synthesis, scan insertion/ATPG, ... formal verification, floor planning, placement, CTS, routing, ...
a month ago